Data storage devices generally operate to store and retrieve data in a fast and efficient manner. Some storage devices utilize a semiconductor array of solid-state memory cells to store individual bits of data. Such memory cells can be volatile or non-volatile. Volatile memory cells generally retain data stored in memory only so long as operational power continues to be supplied to the device, while non-volatile memory cells generally retain data storage in memory even in the absence of the application of operational power.
Some non-volatile memory cells utilize a ferromagnetic construction to store data, such as magnetic random access memory (MRAM) and spin-torque transfer random access memory (STRAM). Such memory cells often utilize a reference layer and a free layer separated by an oxide layer. The magnetization of the reference layer is maintained in a constant orientation, such as by being pinned to a separate magnetization layer (such as a permanent magnet). Different electrical resistances of the memory cell can be established by selectively orienting the magnetization of the free layer so as to be aligned with or opposite to the magnetization orientation of the reference layer. These different resistances can be utilized to indicate different memory states (e.g., logical 0 or 1) for the cell.
Other types of non-volatile memory cells use localized conductive paths to alter programmed resistance levels, such as in the case of resistive random access memory (RRAM). In an RRAM cell, opposing electrodes can be separated by an intermediary insulative layer to provide a first nominal resistance, such as a relatively high resistance. Application of a suitable programming voltage in a first direction across the cell can result in the formation of one or more conductive metalized filaments that extend through the insulative layer from one electrode layer to the other electrode layer. The presence of such filaments can lower the nominal resistance of the cell to a second, lower level. The filament can be retracted back to the originating layer by the application of a suitable programming voltage in the opposite direction across the cell.
In these and other types of memory cell configurations, asymmetries can exist at the cell level in that it can be more difficult to program a resistive sense element in a first direction as compared to a second direction. This can adversely affect data throughput and data consumption rates of the device.